Parallel Fine-Resolution Time Sampling Chip

Proof-of-concept chip for fine-resolution, one-shot, digital time-interval measurements. An array of arbiters samples two input clocks and outputs binary measurement results. External calibration of the mismatches between the arbiters allows the outputs to be converted to a time measurement accurate to approximately 2ps. Fabricated in a 0.35 micron TSMC process. (A second array introduces fixed RC delays between the arbiters and thus allows larger dynamic-range measurements at the cost of lost precision.)