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2026
J. Jung, E. Lee, D. Han, J. Wang, A. P. Chandrakasan, and R. Han, “A 60-GHz Low-Noise mmWave Divider-Less Fractional-N Cascaded PLL Achieving -250.2dB FoMJ in 28-nm CMOS,” 2026 IEEE Journal of Solid-State Circuits (Feb 2026). [Link]
2026
E. Lee, J. Jung, M. Ashok, AP. Chandrakasan, R. Han, "Self-Programmable Twin PUFs via Photovoltaic Energy Harvesting During the Pre-Wafer-Dicing Stage", 2026 IEEE International Solid-State Circuits (ISSCC)(Feb 2026) [Link]
2026
G. Traverso, P. Sheehan, A. Bahai, R. Langer, A.P. Chandrakasan, “The potential of miniaturized ingestible electronics”, Nat Electronics 9, 5–7 (Jan 2026) [Link]
2026
C.Marcus, M.O.G.Nayeem, A.Shah, J.Hou, S.Viswanath, M.Eusebio, D.Sadat, A.P.Chandrakasan, T.Ozmen, C.Dagdeviren, “Real-Time 3D Ultrasound Imaging with an Ultra-Sparse, Low Power Architecture.” Advanced Healthcare Materials (Jan 2026) [Link]
2026
, , , J. Hou, S. Viswanath, M. Eusebio, D. Sadat, A. P. Chandrakasan, T. Ozmen, C. Dagdeviren, “ Real-Time 3D Ultrasound Imaging with an Ultra-Sparse, Low Power Architecture.” Advanced Healthcare Materials (Jan 2026) [Link]
2026
SY. Yang, DU. Yildirim, S. Sharma, D. Han, R. Mittal, H. Ellis, J. Jung, E. Lee, G. Traverso, A.P. Chandrakasan, "A Fully-Integrated Wireless Ingestible CMOS Drug-Delivery Chip With Electrochemical Energy Harvesting and pH-Adaptive MPPT for Personalized Therapeutics", IEEE Journal of Solid-State Circuits (Jan 2026) [Link]
2026
AP. Chandrakasan, B. Otis, R. Muller, JM. Rabaey, "Low-Power Design: The Berkeley Way: How energy morphed IC design", IEEE Solid-State Circuits Magazine (Jan 2026) [Link]
2026
K. Lee, G. Das, D. Han, AP. Chandrakasan, "Securing DNN Acceleration From Off-Chip Memory Vulnerabilities With Low-Overhead Authenticated Encryption", IEEE Transactions on Very Large Scale Integration (Jan 2026) [Link]
2025
M. Ashok,Y. Hu, H. Wang, E.G. Arnault, H.Raniwala, A.G. Amer, M. Trusheim, D.R. Englund, A.P. Chandrakasan, " Heterogeneously Integrated Nitrogen-Vacancy Sensing for Real-Time CMOS Security Threat Detection," in IEEE Transactions on Very Large Scale Integration (VLSI) Systems (Nov. 2025) [Link]
2025
D. Han, A. P. Chandrakasan, "MEGA.mini: An Energy-Efficient NPU Leveraging a Novel Big/Little Core With Hybrid Input Activation for Generative AI Acceleration," in IEEE Journal of Solid-State Circuits (November 2025) [Link]