The Effect Of Random Dopant Fluctuations On Logic Timing At Low Voltage

Rithe, R., S. Chou, J. Gu, A. Wang, S. Datla, G. Gammie, D. Buss, A. Chandrakasan, "The Effect of Random Dopant Fluctuations on Logic Timing at Low Voltage," IEEE Transactions on Very Large Scale Integration (TVLSI) Systems, Vol. 20, No. 5, 911-924, May 2012.