A simple feedback loop determines the supply voltage and system clock frequency needed to just satisfy a computation throughput constraint. The power controller, and a counter to model DSP take 0.4 square mm and 1mW.
This versatile power converter controller provides dual outputs at a fixed switching frequency and can regulate either output voltage or target system delay. Efficiency of > 90% has been demonstrated for low output power levels (milliwatts).
This DC-DC converter introduces several novel circuits which enables efficient operation at output powers from 100µW to 1W. Depending on the load current, the regulator automatically switches between Pulse Frequency Modulation (PFM) and Pulse Width Modulation (PWM), and automatically selects the optimum size for the switching MOSFET.
The QRG is utilized to generate high quality pseudo-random data for use in stream ciphering systems. The QRG utilizes a reconfigurable datapath to performs big-integer arithmetic operations on operands ranging from 8 - 512 bits in size. The QRG utilizes both conventional clock gating and self-timed gating to minimize the switched capacitance.
