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The IDCT core processor computes the Inverse Discrete Cosine Transform on 8x8 blocks of spectral coefficients. It features a clock-gated pipeline that reduces the total system duty cycle in the presence of zero valued spectral coefficients. The chip dissipates 4.5 mW at 1.3V, 14 MHz.

An ultra-low power DC/DC converter is implemented in this chip to enable a load DSP to be powered from ambient mechanical vibration. It uses performance feedback to implement low resolution digital control. Its power consumption is 14 microwatts at 1V.

This wavelet based full motion video encoder performs scalable compression on 30 frames/sec at 128x128 resolution. The encoder dissipates 400-800 µW depending on the spatial and temporal content in the video stream.

The DCT core processor computes the Discrete Cosine Transform on 8x8 blocks of picture elements. It exploits signal correlation and quantization for arithmetic activity minimization and low power operation. The chip dissipates 4.3 mW at 1.5V, 14 MHz.

This chip consists of a low power digital control core and optimized power switches which act in concert with a MEMS (micro-electromechanical systems) variable capacitor to harvest ambient vibrational energy for use by low power electronic loads.

Proof-of-concept chip for fine-resolution, one-shot, digital time-interval measurements. An array of arbiters samples two input clocks and outputs binary measurement results. External calibration of the mismatches between the arbiters allows the outputs to be converted to a time measurement accurate to approximately 2ps. Fabricated in a 0.35 micron TSMC process. (A second array introduces fixed RC delays between the arbiters and thus allows larger dynamic-range measurements at the cost of lost precision.)

16 Oscillators and 24 phase detectors form a distributed, symmetric phase-locked loop that is guaranteed to lock with the phases aligned, and generate a 1.3 GHz clock over the entire 3mm x 3 mm chip. Fabricated in a 0.35 micron TSMC process, the chip consumed 130 mA and 3V.