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In ultrasound imaging systems, a large number of waveforms are acquired in parallel from a transducer array. To facilitate the move to portable ultrasound systems with real-time displays, we implemented a low-power digital beamformer ASIC in 65 nm bulk CMOS technology. We describe three operating modes that provide a run-time tradeoff between image quality and system power consumption. A sliding window approach eliminates the need for an on-chip SRAM, which reduces area and power. The chip generates four output pixels per clock cycle from eight channel of input data, allowing 30 frames per second at 1.92 MHz. The prototype test chip is operational down to a core supply voltage of 0.49 V, with a measured power of 185 uW in real-time operation at 0.52 V.

As wireless charging becomes more commonplace for IoT devices, several scale-related issues need to be addressed. This chip implements the capability for a near-field, resonant wireless power receiver to detune itself (i.e. move its resonant frequency away) from the charger without the use of any switched passive component arrays. Detuning can be used to protect the receiver against harmful transients imposed by counterfeit wireless chargers, which are expected to become more prevalent the same way as counterfeit wired chargers are currently. In addition, a receiver can detune itself to allow more power to be delivered to a farther receiver coupled to the same charger.

A buck converter in 65nm CMOS is optimized for a low quiescent power of 240pW. It operates with input 1.2-3.3V and regulates the output from 0.7-0.9V. Control circuits are designed for low-leakage and static current, and scale in power over a Hz to MHz frequency range, resulting in a wide load current dynamic range of 2E6. With a 2V input, the converter has a peak efficiency of 89% and delivers 500pA to 1mA with efficiency better than 50%. The peak efficiency is 92% for a 1.2V input.

This chip performs automatic speech recognition (ASR) and voice activity detection (VAD). ASR accuracy and memory efficiency are enhanced by the use of compressed neural network acoustic models and a variety of modeling and search techniques, allowing real-time decoding with around 10 MB/s external memory bandwidth. ASR models can be imported after training with open-source tools (Kaldi). We evaluated tasks with vocabulary sizes from 11 words (172 uW) to 145k words (7.78 mW); accuracy is comparable to the equivalent Kaldi software recognizer. VAD is used to enable voice-activated power gating of the ASR and downstream system. We include three VAD algorithms to investigate tradeoffs between performance and power consumption. The modulation frequency algorithm is the most robust to difficult noise environments and consumes 22.3 uW.