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A 0.7 cm2 , 3.5 GHz, −31 dBm Sensitivity Battery-Free 5G Energy-Harvester Backscatterer With 20 s Cold-Start Wake-Up Time for IoT-Enabled Warehouses

The rapid growth of the Internet of Things (IoT) demand ultralow power wireless systems. This article presents a 3.5 GHz Citizens Broadband Radio Service (CBRS) band wireless energy harvesting backscatter system, optimized for sensitivity and start-up time, making it ideal for fast inventory counts and extensive coverage in IoT-enabled warehouses. The system features a rectifier with −31 dBm sensitivity for 0.9 V output, enabling quick energy storage within ∼20 s from cold start. It employs backscattering blocks consuming 120 nW power with improved uplink data transfer resiliency to reduce minimize time. Incorporating a current-starved oscillator and self-clocked signal encoding, our design replaces low-dropout regulator (LDO) with a PTAT-current source inside backscattering/communication blocks to cut power consumption, while also boosting PVT-resiliency. Fabricated in TSMC 65 nm CMOS, the chip outperforms existing solutions in area and power efficiency. This comprehensive system not only boosts the capabilities of battery-free IoT tags but also opens new avenues for their application in industrial and commercial settings, paving the way for the next generation of IoT devices. Index Terms— Antenna, backscatter

A secure digital in-memory compute (IMC) macro with protections for side-channel and bus probing attacks

Machine learning (ML) accelerators provide energy efficient neural network (NN) implementations for applications such as speech recognition and image processing. Recently, digital IMC has been proposed to reduce data transfer energy, while still allowing for higher bitwidths and accuracies necessary for many workloads, especially with technology scaling [1], [2]. Privacy of ML workloads can be exploited with physical side-channel attacks (SCAs) or bus probing attacks (BPAs) [3] (Fig. 1). While SCAs correlate IC power consumption or EM emissions to data or operations, BPAs directly tap traces between the IC and off-chip memory. The inputs reflect private data collected on loT devices, such as images of faces. The weights, typically stored off-chip, reveal information about proprietary private training datasets. This work presents the first IMC macro protected against SCAs and BPAs to mitigate these risks.

An energy-efficient neural network accelerator with improved resilience against fault attacks

Embedded neural network (NN) implementations are vulnerable to misclassification under fault attacks (FAs). Clock glitching and injecting strong electromagnetic (EM) pulses are two simple yet detrimental FA techniques that disrupt the NN by: 1) introducing errors in the NN model and 2) corrupting NN computation results. This article introduces the first application-specific integrated circuit (ASIC) demonstration of an energy-efficient NN accelerator equipped with built-in FA detection capabilities. We have integrated lightweight cryptography-based checks for on-chip verification to identify model errors and additionally serve as a fault detection sensor for spotting computational errors. We showcase high error-detection capabilities along with a minimal area overhead of 5.9% and negligible impact on NN accuracy.

12.5 A Packageless Anti-Tampering Tag Utilizing Unclonable Sub-THz Wave Scattering at the Chip-Item Interface

RFID technologies have been widely deployed in supply-chain management for logistics tracking and goods integrity. Recently, millimeter-wave and sub-THz carriers are used to enable on-chip antenna integration and hence packageless, miniature RFID form factors. In [1], a 4.4mm2 chip with 24GHz downlink and 60GHz uplink is presented. In [2], the tag size is further reduced to 1.6mm2 by pushing the carrier frequency to 260GHz. While these tiny tags allow for non-intrusive labeling, they still share one drawback with other RFIDs in anti-counterfeiting of goods (Fig. 12.5.1): if an RFID (even if the ID itself is unclonable) is detached from the genuine item and reattached to a fake item, the authentication fails. Unlike in other anti-tampering digital systems, the low power, cost and size budgets in RFIDs pose great challenges to implementing effective anti-tampering capabilities. Current solutions are based on fragile packaging materials that can easily break if physical tampering occurs [3–4]. This mechanism is, however, not reliable (e.g. under gentle or solvent-assisted detachments, and the damage can be recovered) and prevents the monolithic integration and tag miniaturization shown in [1–2]. In comparison, the anti-tampering is significantly enhanced if the fingerprinting for tampering detection is inherent to the “attachment” itself, such as the random glue distribution and the roughness of the item surface, which are very difficult to clone. Based on this principle, in this paper, we present a monolithic tag chip that utilizes a sub-THz wave not only to perform uplink/downlink communications with a compact 4.2mm2 tag size, but also to detect tampering through the unique sub-THz wave scattering at the chip-item interface with random variation at tens to hundreds of μm scale (Fig. 12.5.1)