A 3.1-5GHz All-Digital UWB Transmitter

This chip demonstrates an all-digital technique for generating UWB pulses with a programmable width and a center frequency tunable to 3 channels in the 3.1-5GHz band without the use of an RF oscillator. A delay-based spectral scrambling technique is proposed and implemented in this chip that exploits the delay-line based digital architecture to scramble the output spectrum. The main advantage of this scrambling technique is a drastic reduction of the hardware required to implement it, relative to the more commonly used BPSK scrambling. The transmitter uses only digital blocks, including the final stage driving the 50Ohm UWB antenna, which is a digital pad driver. The circuit consumes a total of 43pJ/bit at a data rate of 16.7Mb/s, including all core, control, and I/O power.