A Low-Power Elliptic Curve Pairing Crypto-Processor For Secure Embedded Blockchain And Functional Encryption

Our pairing hardware implementation enables more than two orders of magnitude improvement in performance and energy-efficiency compared to embedded software. Several circuit, architecture and algorithm techniques are used to achieve this energy-efficient design. A 64-bit word-serial Montgomery modular arithmetic unit provides up to 50% energy savings compared to traditional designs with smaller word sizes. Karatsuba-style divide-and-conquer techniques are used to reduce energy consumption of the pairing computation by 35%. Strategically sharing computations between the Miller Loop and the Final Exponentiation gives another 30% energy savings. A hierarchical memory architecture with dedicated clock gates is used to achieve additional 20% reduction in energy consumption. Special properties of the BLS12-381 curve are exploited to further provide up to 2x improvement in performance and energy-efficiency of different pairing-based algorithms