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A 14-nm Energy-Efficient And Reconfigurable Analog Current-Domain In-Memory Compute SRAM Accelerator

A. G. Amer, M. Ashok, X. Zhang, J. Cohn and A. P. Chandrakasan, "A 14-nm Energy-Efficient and Reconfigurable Analog Current-Domain In-Memory Compute SRAM Accelerator," 2025 38th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID), Bangalore, India (Jan 2025)