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A 45nm 0.5V 8T Column-Interleaved SRAM With On-Chip Reference Selection Loop For Sense-Amplifier

Sinangil, M., E., N. Verma, A. P. Chandrakasan, "A 45nm 0.5V 8T Column-Interleaved SRAM with on-Chip Reference Selection Loop for Sense-Amplifier," IEEE Asian Solid-State Circuits Conference (A-SSCC), pp. 225-228, November 2009.