CompAcc: Efficient Hardware Realization For Processing Compressed Neural Networks Using Accumulator Arrays

Ji Z., W. Jung, J. Woo, K. Sethi, S. Lu, A. P. Chandrakasan, "CompAcc: Efficient Hardware Realization for Processing Compressed Neural Networks Using Accumulator Arrays," IEEE Asian Solid-State Circuits Conference (A-SSCC), Nov. 2020.