Highly Interleaved 5-bit, 250-MSample/s, 1.2mW ADC With Redundant Channels In 65nm CMOS

Ginsburg, B. P., and A. Chandrakasan, "Highly Interleaved 5-bit, 250-MSample/s, 1.2mW ADC with Redundant Channels in 65nm CMOS," IEEE Journal of Solid-State Circuits, vol. 43, no. 12, pp. 2641-2650, December 2008.