Embedded Power Supply for Low-Power DSP
Gutnik, V., A.P. Chandrakasan, "Embedded Power Supply for Low-Power DSP," IEEE Transactions on Very Large Scale Integration (VLSI) Systems, pp. 425-435, Dec. 1997.
Blog Archives
Voltage Reduction Techniques for Portable Systems
Chandrakasan, A. P., "Voltage Reduction Techniques for Portable Systems," IEEE ASIC Conference, pp. 3-6, Portland, Oregon, Sept. 1997 (Invited Paper)
Network Driven Motion Estimation for Portable Video Terminals
Rabiner, W., and A. P. Chandrakasan, "Network Driven Motion Estimation for Portable Video Terminals," IEEE Transactions on Circuits and Systems for Video Technology, pp. 644-653, August 1997.
A Framework for Distributed Web-based Microsystem Design
Saha, D., A. P. Chandrakasan, "A Framework for Distributed Web-based Microsystem Design," IEEE Sixth Workshop on Enabling Technologies: Infrastructure for Collaborative Enterprises, pp. 69-74, Cambridge, MA June 1997
Ultra Low Power Control Circuits for PWM Converters
Dancy, A., A. P. Chandrakasan, "Ultra Low Power Control Circuits for PWM Converters," IEEE Power Electronics Specialists Conference, St. Louis, Missouri, pp. 21-27, June 1997
Self Powered Low Power Signal Processing
Amirtharajah, R., A. P. Chandrakasan, "Self Powered Low Power Signal Processing," IEEE Symposium on VLSI Circuits, pp. 25-26, Kyoto, Japan, June 1997
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT
Xanthopoulos, T., Y. Yaoi, A. Chandrakasan, "Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT" IEEE/ACM Design Automation Conference, pp. 415-420, Anaheim, California, June 1997
Transistor Sizing Issues and Tool For Multi-Threshold CMOS Technology
Kao, J., A. Chandrakasan, D. Antoniadis, "Transistor Sizing Issues and Tool For Multi-Threshold CMOS Technology," IEEE/ACM Design Automation Conference, pp. 409-414, Anaheim, California, June 1997
Design of Low Power Variable Length Decoder Using Fine Grain Non-Uniform Table Partitioning
Cho, S., T. Xanthopoulos, A. P. Chandrakasan, "Design of Low Power Variable Length Decoder Using Fine Grain Non-Uniform Table Partitioning," IEEE International Symposium on Circuits and Systems, pp. 2156-2159, Hong Kong, June 1997
Back-gated CMOS on SOIAS For Dynamic Threshold Voltage Control
Yang, I., C. Vieri, A. P. Chandrakasan, D. Antoniadis, "Back-gated CMOS on SOIAS For Dynamic Threshold Voltage Control," IEEE Transactions of Electron Devices, pp. 822-831, May 1997. (IEEE Electron Devices Society's Paul Rappaport Award for the Best Paper in an EDS publication during 1997)