Active GHz Clock Network Using Distributed PLLs
Gutnik, V., A. P. Chandrakasan, "Active GHz Clock Network Using Distributed PLLs," IEEE Journal of Solid-State Circuits, pp. 1553-1560, November 2000.
Blog Archives
Power-Aware Systems
Bhardwaj, M., R. Min, A. P.Chandrakasan, "Power-Aware Systems," 34th Asilomar Conference on Signals, Systems, and Computers, pp. 1695-1701, Monterey, California, November 2000. [Slides]
Bus Energy Minimization by Transition Pattern Coding (TPC) in Deep Submicron Technologies
Sotiriadis, P. A. P. Chandrakasan "Bus Energy Minimization by Transition Pattern Coding (TPC) in Deep Submicron Technologies," IEEE/ACM International Computer-Aided Design Conference, pp. 320-327, San Jose, California, November 2000.
An Architecture for a Power-Aware Distributed Microsensor Node
Min, R., B. Bhardwaj, S. Cho, A. Sinha, E. Shih, A. Wang, A. P. Chandrakasan, "An Architecture for a Power-Aware Distributed Microsensor Node," IEEE Workshop on Signal Processing Systems (SiPS '00), pp. 581-590, Louisiana, Lafayette, October 2000.
Transition Pattern Coding: An approach to Reduce Energy in Interconnect
Sotiriadis, P., A. Wang, A. P. Chandrakasan, "Transition Pattern Coding: An approach to Reduce Energy in Interconnect," IEEE ESSCIRC, pp. 320-323, Stockholm, Sweden, Sept. 2000.
OpenDesign: An Open User-Configurable Project Environment for Collaborative Design and Execution on the Internet
Lavana, H., F. Brglez, R. Reese, G. Konduri, A. P. Chandrakasan, "OpenDesign: An Open User-Configurable Project Environment for Collaborative Design and Execution on the Internet," IEEE Intl. Conference on Computer Design, pp. 567-570, Austin, Texas, September 2000.
An Energy Efficient Reconfigurable Public-Key Cryptograhpy Processor Architecture
Goodman, J., A. P. Chandrakasan, "An Energy Efficient Reconfigurable Public-Key Cryptograhpy Processor Architecture," CHES 2000, pp. 175-190, Worchester, Massachusetts, August 2000.
Algorithmic Transforms for Efficient Energy Scalable Computation
Sinha, A., A. Wang, A. Chandrakasan, "Algorithmic Transforms for Efficient Energy Scalable Computation," The 2000 IEEE International Symposium on Low-Power Electronic Design (ISLPED' 00), pp. 31-36, Rapallo, Italy, August 2000.
Dual-Threshold Techniques for Low-Power Digital Circuits
Kao, J., A. P. Chandrakasan, "Dual-Threshold Techniques for Low-Power Digital Circuits," IEEE Journal of Solid-State Circuits, pp. 1009-1018, July 2000.
High Efficiency Multiple Output DC-DC Conversion for Low-Voltage Systems
Dancy, A. R. Amirtharajah, and A. P. Chandrakasan, "High Efficiency Multiple Output DC-DC Conversion for Low-Voltage Systems," IEEE Trans. on Very Large Scale Integration (VLSI) Systems, pp. 252-263, June 2000.