2023 – Energy-Efficient Circuits and Systems Group

A 6.4-GS/s 1-GHz BW Continuous-Time Pipelined ADC With Time-Interleaved Sub-ADC-DAC Achieving 61.7-dB SNDR in 16-nm FinFET

R. Mittal, H. Shibata, S. Patil, E. Krommenhoek, P. Shrestha, G. Manganaro, A. P. Chandrakasan, H. S. Lee,"A 6.4-GS/s 1-GHz BW Continuous-Time Pipelined ADC With Time-Interleaved Sub-ADC-DAC Achieving 61.7-dB SNDR in 16-nm FinFET," in IEEE Journal of Solid-State Circuits, Dec 2023

Mad: Memory-aware design techniques for accelerating fully homomorphic encryption

R. Agrawal, L.D. Castro, C. Juvekar, A. Chandrakasan, V. Vaikuntanathan, A. Joshi, "MAD: Memory-Aware Design Techniques for Accelerating Fully Homomorphic Encryption", 56th IEEE/ACM International Symposium on Microarchitecture (MICRO '23), Dec 2023.

A conformable phased-array ultrasound patch for bladder volume monitoring

Lin Zhang, Colin Marcus, Dabin Lin, David Mejorado, Scott Joseph Schoen Jr, Theodore T. Pierce, Viksit Kumar, Sara V. Fernandez, David Hunt, Qian Li, Ikra Iftekhar Shuvo, David Sadat, Wenya Du, Hannah Edenbaum, Li Jin, Weiguo Liu, Yonina C. Eldar, Fei Li, Anantha P. Chandrakasan, Anthony E. Samir & Canan Dagdeviren,"A conformable phased-array ultrasound patch for bladder volume monitoring" Nature Electronics, Nov 2023

A 1.54 mm2, 264-GHz Wake-Up Receiver with Integrated Cryptographic Authentication for Ultra-Miniaturized Platforms

E. Lee, M. I. W. Khan, X. Chen, U. Banerjee, N. Monroe, R. T. Yazicigil, R. Han, A. P. Chandrakasan, A 1.54 mm2, 264-GHz Wake-Up Receiver with Integrated Cryptographic Authentication for Ultra-Miniaturized Platforms, IEEE Journal of Solid-State Circuits (JSSC), Nov. 2023

SecureLoop: Design Space Exploration of Secure DNN Accelerators

Lee K., M. Yan, J. S. Emer, A. P. Chandrakasan, “SecueLoop: Design Space Exploration of Secure DNN Accelerators,” 56th IEEE/ACM International Symposium on Microarchitecture, Oct. 2023.

Memory-efficient low-compute segmentation algorithms for bladder-monitoring smart ultrasound devices

Z. Song, M. Asiedu, S. Wang, Q. Li, A. Ozturk, V. Mittal, S. Schoen Jr., S. Ramaswamy, T. T. Pierce, A. E. Samir, Y. C. Eldar, A. Chandrakasan, and V. Kumar, “Memory-efficient low-compute segmentation algorithms for bladder-monitoring smart ultrasound devices,” Nat. Sci. Reports, vol. 13, 16450 (Sep 2023).

An Energy-Efficient Neural Network Accelerator with Improved Protections Against Fault-Attacks

S. Maji, K. Lee, C. Gongye, Y. Fei and A. P. Chandrakasan, "An Energy-Efficient Neural Network Accelerator with Improved Protections Against Fault-Attacks," ESSCIRC 2023- IEEE 49th European Solid State Circuits Conference (ESSCIRC), Sep 2023

A Fully-Integrated Energy-Scalable Transformer Accelerator

Z. Ji, H. Wang, M. Wang, W.-S. Khwa, M.-F. Chang, S. Han, A. P. Chandrakasan, “A Fully-Integrated Energy-Scalable Transformer Accelerator Supporting Adaptive Model Configuration and Word Elimination for Language Understanding on Edge Devices,” ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED), Aug. 2023.

Conformable Ultrasound Breast Patch for Deep Tissue Scanning and Imaging

Du W., L. Zhang, E. Suh, D. Lin, C. Marcus, L. Ozkan, A. Ahuja, S. Fernandez, I. I. Shuvo, D. Sadat, W. Liu, F. Li, A. P. Chandrakasan, T. Ozmen, C. Dagdeviren, "Conformable Ultrasound Breast Patch for Deep Tissue Scanning and Imaging," Science Advances, Jul. 2023.

Sub-1.4 cm3 Capsule for Detecting Labile Inflammatory Biomarkers In Situ

Inda-Webb M. E., M. Jimenez, Q. Liu, N. V. Phan, J. Ahn, C. Steiger, A. Wentworth, A. Riaz, T. Zirtiloglu, K. Wong, K. Ishida, N. Fabian, J. Jenkins, J. Kuosmanen, W. Madani, R. McNally, Y. Lai, A. Hayward, M. Mimee, P. Nadeau, A. P. Chandrakasan, G. Traverso, R. T. Yazicigil, T. K. Lu, "Sub-1.4 cm³ Capsule for Detecting Labile Inflammatory Biomarkers In Situ," Nature, Jul. 2023.