Skip to main content

Optical Clocking Chip

Image of chip design
This test chip consists of an optical receiver and detector designed to investigate the effects of variation and to characterize area and power requirements of an optical interconnect system.

Vibration-to-Electric MEMS Device

Image of chip design
Mechanical vibrations are converted into electrical energy by using a MEMS variable capacitor. The variable capacitor consists of a 1.5cm-by-0.5cm silicon structure etched in a wafer of 500µm thickness.

Low Power Sensor DSP for Biomedical Applications

Image of chip design
This DSP chip is targeted toward low and medium throughput sensor applications. It is a hybrid architecture consisting of custom filtering units and a programmable microcontroller. It has run a real-time acoustic heartbeat detection algorithm successfully at a power consumption of 560 nW at 1.5 V.

Domain Specific Reconfigurable Cryptographic Processor

Image of chip design
The DSRCP utilizes a dynamically-reconfigurable datapath to implement a variety of public key cryptographic primitives and algorithms including large integer arithmetic (8 - 1024), both prime and binary Galois Field arithmetic (GF(2^8) - GF(2^1024), and GF(p) for 2^8 < p < 2^1024), and Elliptic Curve arithmetic over both integer and binary Galois fields.