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This paper reports the first chip-based demonstration (at any frequency) of a CMOS front-end that generates and receives electromagnetic waves with rotating wave phase front (namely orbital angular momentum or OAM). The chip, based on a uniform circularly placed patch antenna array at 0.31THz, transmits reconfigurable OAM modes, which are digitally switched among the m=0 (plane wave), +1 (left-handed), -1 (right-handed) and superposition (+1)+(-1) states. The chip is also reconfigurable into a receiver mode that identifies different OAM modes with >10dB rejection of unintended modes. The array, driven by only one active path, has a measured EIRP of -4.8dBm and consumes 154mW of DC power in the OAM source mode. In the receiver mode, it has a measured conversion loss of 30dB and consumes 166mW of DC power. The output OAM beam profiles and mode orthogonality are experimentally verified and a full silicon OAM link is demonstrated.

Our pairing hardware implementation enables more than two orders of magnitude improvement in performance and energy-efficiency compared to embedded software. Several circuit, architecture and algorithm techniques are used to achieve this energy-efficient design. A 64-bit word-serial Montgomery modular arithmetic unit provides up to 50% energy savings compared to traditional designs with smaller word sizes. Karatsuba-style divide-and-conquer techniques are used to reduce energy consumption of the pairing computation by 35%. Strategically sharing computations between the Miller Loop and the Final Exponentiation gives another 30% energy savings. A hierarchical memory architecture with dedicated clock gates is used to achieve additional 20% reduction in energy consumption. Special properties of the BLS12-381 curve are exploited to further provide up to 2x improvement in performance and energy-efficiency of different pairing-based algorithms

This work describes a sampling-rate scalable, package-integrated magnetometer with CMOS-integrated fluxgate, that achieves 100x lower compensation energy with duty cycling for 1kHz power monitoring applications, while achieving 1.67x higher peak BW than previous IFG sensors for fault detection. Key contributions include 1) mixed signal front-end design to hold digitized compensation value during sleep and resume operation from last converged point (LCP), saving up to 100 convergence cycles when duty cycling, 2) hierarchical bypass/coarse/fine search modes to guarantee quick convergence (< 20μs), even for 2mT field swing between samples in heavily-duty-cycled systems, and 3) faster sampling and read out (1.3μs) for lower energy per sample and higher BW.