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Energy-Efficient Circuits and Systems Group
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A 28nm High-Density 6T SRAM Wth Optimized Peripheral-Assst Circuits For Operation Down To 0.6V

Sinangil, M., H. Mair, A. Chandrakasan, "A 28nm High-Density 6T SRAM wth Optimized Peripheral-Assst Circuits for Operation Down to 0.6V," IEEE International Solid-State Circuits Conference (ISSCC), pp. 260-261, Feb 2011. [Slides]