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Energy-Efficient Circuits and Systems Group
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A 65nm 8T Sub-Vt SRAM Employing Sense-Amplifier Redundancy

Verma N., A. P. Chandrakasan, "A 65nm 8T Sub-Vt SRAM Employing Sense-Amplifier Redundancy," IEEE International Solid-State Circuits Conference (ISSCC), pp. 328-329, February 2007. [Slides]