Highly Interleaved 5b 250MS/s ADC With Redundant Channels In 65nm CMOS

Ginsburg, B. P., A. P. Chandrakasan, "Highly Interleaved 5b 250MS/s ADC with Redundant Channels in 65nm CMOS," IEEE International Solid-State Circuits Conference (ISSCC), pp. 240-241, February, 2008. [Slides]