Blog Archives

Verma, N., A. P. Chandrakasan, "An Ultra Low Energy 12-bit Rate-Resolution Scalable SAR ADC for Wireless Sensor Nodes", IEEE Journal of Solid-State Circuits, vol. 42, no. 6, pp. 1196-1205, June 2007.

Daly, D. C., A. P. Chandrakasan, "An Energy-Efficient OOK Transceiver for Wireless Sensor Networks," IEEE Journal of Solid-State Circuits, vol. 42, no. 5, pp. 1003-1011, May 2007.

Ginsburg, B. P., A. P. Chandrakasan, "500-MS/s 5-bit ADC in 65-nm CMOS With Split Capacitor Array DAC," IEEE Journal of Solid-State Circuits, vol. 42, no. 4, pp. 739-747, April 2007.

Calhoun, B. H., A. P. Chandrakasan, "A 256kb 65nm Sub-threshold SRAM Design for Ultra-Low Voltage Operation," IEEE Journal of Solid-State Circuits, vol. 42, no. 3, pp. 680-688, March 2007.

Ginsburg, B. P., A. P. Chandrakasan, "Dual Time-Interleaved Successive Approximation Register ADCs for an Ultra-Wideband Receiver," IEEE Journal of Solid-State Circuits, vol. 42, no. 2, pp. 247-257, February 2007.

Lee, F. S., A. P. Chandrakasan, "A BiCMOS Ultra-Wideband 3.1-10.6GHz Front-End," IEEE Journal of Solid-State Circuits, pp. 1856-1866, August 2006.

Calhoun, B. H., A. P. Chandrakasan, "Static Noise Margin Variation for Sub-threshold SRAM in 65nm CMOS," IEEE Journal of Solid-State Circuits, vol. 41, no. 7, pp. 1673-1679, July 2006.

Wentzloff, D. D., A. P. Chandrakasan, "Gaussian Pulse Generators for Subbanded Ultra-Wideband Transmitters," IEEE Transactions on Microwave Theory and Techniques, Vol. 54, No. 4, pp. 1647-1654, April 2006.

Calhoun, B. H., A. P. Chandrakasan, "Ultra-Dynamic Voltage Scaling (UDVS) Using Sub-Threshold Operation and Local Voltage Dithering," IEEE Journal of Solid-State Circuits, Vol. 41, No. 1, pp. 238-245, January 2006.

Calhoun, B. H., A. Wang, A. Chandrakasan, "Modeling and Sizing for Minimum Energy Operation in Subthreshold Circuits," IEEE Journal of Solid-State Circuits, vol. 40, no. 9, pp. 1778-1786, September 2005.