The Effect of Substrate Noise on VCO Performance
Checka, N., D. D. Wentzloff, A. Chandrakasan, R. Reif. "The Effect of Substrate Noise on VCO Performance," IEEE Radio Frequency Integrated Circuits Symposium, pp. 523-526, June 2005. [Slides]
Blog Archives
Design Considerations for Ultra-low Energy Wireless Microsensor Nodes
Calhoun, B. H., D. C. Daly, N. Verma, D. Finchelstein, D. D. Wentzloff, A. Wang, S.-H. Cho, and A. P. Chandrakasan, "Design Considerations for Ultra-low Energy Wireless Microsensor Nodes," IEEE Transactions on Computers. pp. 727-749, June 2005.
An Energy-Efficient Charge Recycling Approach for a SAR Converter With Capacitive DAC
Ginsburg, B. P., A. P. Chandrakasan, "An Energy-Efficient Charge Recycling Approach for a SAR Converter With Capacitive DAC," to be presented at IEEE Conference on Circuits and Systems (ISCAS), pp. 184-187, May 2005. [Slides]
A 3-D FPGA Wire Resource Prediction Model Validated using a 3-D Placement and Routing Tool
Kwon, Y.-S., P. Lajevardi, A. P. Chandrakasan, F. Honore, and D. E. Troxel, "A 3-D FPGA Wire Resource Prediction Model Validated using a 3-D Placement and Routing Tool," IEEE System-Level Interconnect Prediction, April 2005.
Architectures for Energy-Aware Impulse UWB Communications
Blazquez, R., A. Chandrakasan, "Architectures for Energy-Aware Impulse UWB Communications," ICASSP 2005, Philadelphia, pp. 18-32, March 2005. [Slides]
Direct Conversion Pulsed UWB Transceiver Architecture
Blazquez, R., F. S. Lee, D. D. Wentzloff, B. Ginsburg, J. Powell, A. P. Chandrakasan, "Direct Conversion Pulsed UWB Transceiver Architecture," Design, Automation and Test in Europe, pp. 94-95, March 2005. [Slides]
Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives
Bougard, B., F. Catthoor, D. C. Daly, A. Chandrakasan and W. Dehaene, "Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives," Design, Automation, and Test in Europe (DATE), pp. 196-201, March 2005. [Slides]
Ultra-Dynamic Voltage Scaling Using Sub-threshold Operation and Local Voltage Dithering in 90nm CMOS
Calhoun, B. H., A. P. Chandrakasan, "Ultra-Dynamic Voltage Scaling Using Sub-threshold Operation and Local Voltage Dithering in 90nm CMOS," IEEE ISSCC, pp. 300-301, February 2005. [Slides]
A 180-mV Subthreshold FFT Processor Using a Minimum Energy Design Methodology
Wang, A., A. P. Chandrakasan, "A 180-mV Subthreshold FFT Processor Using a Minimum Energy Design Methodology," IEEE Journal of Solid-State Circuits, vol. 40, no. 1, pp. 310-319, January 2005.