An Energy-Efficient OOK Transceiver for Wireless Sensor Networks
Daly, D. C., A. P. Chandrakasan, "An Energy-Efficient OOK Transceiver for Wireless Sensor Networks," IEEE Journal of Solid-State Circuits, vol. 42, no. 5, pp. 1003-1011, May 2007.
Blog Archives
Delay-Based BPSK for Pulsed-UWB Communication
Wentzloff, D.D. and A. P. Chandrakasan, "Delay-Based BPSK for Pulsed-UWB Communication," IEEE International Conference on Speech, Acoustics, and Signal Processing, pp. 561-564, April 2007. [Poster]
A Test-Structure to Efficiently Measure Threshold-Voltage Variation in Large MOSFET Arrays
Drego, N., A. Chandrakasan, and D. Boning, "A Test-Structure to Efficiently Measure Threshold-Voltage Variation in Large MOSFET Arrays," Int. Symp. on Quality Electronic Design (ISQED), pp. 281-286, April 2007.
500-MS/s 5-bit ADC in 65-nm CMOS With Split Capacitor Array DAC
Ginsburg, B. P., A. P. Chandrakasan, "500-MS/s 5-bit ADC in 65-nm CMOS With Split Capacitor Array DAC," IEEE Journal of Solid-State Circuits, vol. 42, no. 4, pp. 739-747, April 2007.
A Parallel Energy Efficient 100Mbps Ultra-Wideband Radio Baseband
Ginsburg, B.P., V. Sze, A. P. Chandrakasan, "A Parallel Energy Efficient 100Mbps Ultra-Wideband Radio Baseband," Government Microcircuit Applications & Critical Technology Conference (GOMACTech), pp. 75-78, March 2007.
Ultra-Dynamic Voltage Scaling for Energy Starved Electronics
Wang, A., B. H. Calhoun, N. Verma, J. Kwong, A. Chandrakasan, "Ultra-Dynamic Voltage Scaling for Energy Starved Electronics," Government Microcircuit Applications & Critical Technology Conference (GOMACTech), pp. 451-454, March 2007.
A 256kb 65nm Sub-threshold SRAM Design for Ultra-Low Voltage Operation
Calhoun, B. H., A. P. Chandrakasan, "A 256kb 65nm Sub-threshold SRAM Design for Ultra-Low Voltage Operation," IEEE Journal of Solid-State Circuits, vol. 42, no. 3, pp. 680-688, March 2007.
A 2.5nJ/b 0.65V 3-to-5GHz Subbanded UWB Receiver in 90nm CMOS
Lee, F.S., A. P. Chandrakasan, "A 2.5nJ/b 0.65V 3-to-5GHz Subbanded UWB Receiver in 90nm CMOS," IEEE International Solid-State Circuits Conference (ISSCC), pp. 116-117, February 2007. [Slides]
Minimum Energy Tracking Loop with Embedded DC-DC Converter Delivering Voltages Down to 250mV in 65nm CMOS
Ramadass Y., A. P. Chandrakasan, "Minimum Energy Tracking Loop with Embedded DC-DC Converter Delivering Voltages Down to 250mV in 65nm CMOS," IEEE International Solid-State Circuits Conference (ISSCC), pp. 64-65, February 2007. [Slides]
A 65nm 8T Sub-Vt SRAM Employing Sense-Amplifier Redundancy
Verma N., A. P. Chandrakasan, "A 65nm 8T Sub-Vt SRAM Employing Sense-Amplifier Redundancy," IEEE International Solid-State Circuits Conference (ISSCC), pp. 328-329, February 2007. [Slides]