Blog Archives

Daly, D. C., A. P. Chandrakasan, "An Energy Efficient OOK Transceiver for Wireless Sensor Networks," IEEE Radio Frequency Integrated Circuits Symposium, pp. 279-282, June 2006. [Slides]

Sze, V., R. Blazquez, M. Bhardwaj, A. Chandrakasan, "An Energy Efficient Sub-Threshold Baseband Processor Architecture For Pulsed Ultra-Wideband Communications," IEEE International Conference on Acoustics, Speech and Signal Processing, pp. (III) 908-911, May 2006. [Slides]

Chandrakasan, A. P., N. Verma, J. Kwong, D. Daly, N. Ickes, D. Finchelstein, B. Calhoun, "Micropower Wireless Sensors," Presented at NSTI Nanotech, May 7-11, 2006. vol 3, pp. 459-462.

Verma, N., A. P. Chandrakasan, "A 25uW 100kS/s 12b ADC for Wireless Micro-Sensor Applications," IEEE ISSCC, pp. 222-223, February 2006. [Slides]

Calhoun, B. H., A. P. Chandrakasan, "A 256kb Sub-threshold SRAM in 65nm CMOS," IEEE ISSCC, pp. 628-629, February 2006. [Slides]

Ginsburg, B. P., A. P. Chandrakasan, "Dual Scalable 500MS/s, 5b Time-Interleaved SAR ADCs for UWB Applications," IEEE CICC, pp. 403-406, September 2005. [Slides]

Checka, N., A. Chandrakasan and R. Reif, "Substrate Noise Analysis and Experimental Verification for the Efficient Noise Prediction of a Digital PLL," IEEE CICC, pp. 473-476, September 2005. [Slides]

Lee, F. S., A. P. Chandrakasan, "A BiCMOS Ultra-Wideband 3.1-10.6GHz Front-End," IEEE CICC, pp. 153-156, September 2005. [Slides]

Calhoun, B. H., A. P. Chandrakasan, "Analyzing Static Noise Margin for Subthreshold SRAM in 65nm CMOS," IEEE European Solid State Circuits Conference (ESSCIRC), pp. 363-366, September 2005. [Slides]

Honore, F., A. P. Chandrakasan, "A power-performance scalable FPGA using configurable voltage domains and a design mapping tool," International Conference on Field Programmable Logic and Applications, pp. 709-710, August 2005.